Computer memories can be divided into two kinds based on the method of designating the contents. The first kind of memory which is seen in the existing computers, is the method of reading out the stored data from the respective addresses after establishing a series of addresses for finding the target items. In such a case, even if a certain information is stored at a certain address, if the address is unknown, the information cannot be inputted or outputted to and from the address. That is, only method of accessing to the information is to know the certain address.
The other kind of memory which is similar with the human memory, functions in such a manner that a large quantity of information is found out by means of a small amount of information. Thus, the memory device in which the stored data is found out by means of data contents is called an associative memory, and is also called a content addressable memory (CAM), because the designation is made by means of the contents.
In such a method, the designations of addresses are not required, and data can be stored in the form of certain symbols instead of using numerals, with the result that combinations of infinite patterns are possible. Such an associative memory is based on the neural network model, and is applicable to the fields of the image recognition and the pattern recognition.
In 1988, the Bell Laboratory of the AT & T Company disclosed the possibility of formation of a VLSI based on a neural network model through the use of the associative memory of FIG. 2 and the pattern classifier of FIG. 1. (H. P. Graf, L. D. Jackel, and W. E. Hubbard; VLSI Implementation of a Neural Network Model, IEEE Trans. Computers; PP. 41-49, March 1988).
In FIG. 1, the pattern classifier includes an amplifier which consists of a label unit and a vector unit. Several vectors are stored in the circuit, and each of the vectors is connected to the input line of a label unit. The element of the vectors stored can have a value of -1 or +1, and an excitatory connection is marked by a value of +1, while an inhibitory connection is marked by -1. The input vector is provided by inputting vector units, and the elements of the input vector can have a value of 1 or 0. Each time a value of +1 is added to the input vector, the current is increased or decreased to the input line of the label unit, depending on the connection pattern. In this circuit, a stable state is formed when the total current flowing through the input line of the label unit becomes 0. If the input voltage exceeds the threshold value of the amplifier, then the output of the label unit will have a high state, while, otherwise, the output will be kept at a low state. The output of the label unit is governed by Formula (1) as specified below. ##EQU1## where .delta..sub.1 indicates the element of the input vector (+1,0), .mu..sub.1 indicates the element of the stored vector (-1,0,+1), and Ri indicates the connection resistance (R-,R+).
The input vectors are compared with the stored vectors in a parallel form, and thus, an inner product between the input vector and the stored vector is produced. The outputs of the label units corresponding to all the stored vectors which approximately resemble the input vector will have a high state. If the input vector has a value of +1 at the position where the stored vector has a positive value, then the sum of the inner product is increased, whereas, if the input vector has a value of +1 at the position where the stored vector has a value of -1, the sum of the inner product is decreased.
In this circuit, if the value of the connection resistance R is made to be larger than the value of the connection resistance R+, then the inner product of the mismatch state, in which an input value of +1 is fed to the position of a stored vector having -1, becomes larger than the inner product of a match state.
Accordingly, if an input value of 1 is added to the position where the stored vector has a value of -1, it can be seen that the input vector is mismatching to the stored vector. Then there arises the problem that the label unit outputs a match state regardless of the stored vector. That is, as shown in FIG. 1, if it is assumed that the stored vectors hold the values of (-1,+1,0,+1) and (+1,+1,-1,+1), and in this state, if (0,+1,0,0) are inputted, the two label units will output a high state which is a match state.
The associative memory of FIG. 2 is constituted such that an inhibitory connection -1 is added between the label units in the pattern classifier of FIG. 1, and that the outputs of the label units are connected to the input lines of the vector units, with the result that it holds the above described disadvantages.